Scheme for implementing breakpoints for on-chip ROM code...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711S156000

Reexamination Certificate

active

06925521

ABSTRACT:
The present invention relates to a system and a method for preventing address conflicts when establishing breakpoints and applying one or more patches to code residing on a read only memory (ROM) device. The system and method generally comprises identifying one or more program addresses which require patching, whereby one or more patch addresses are defined; evaluating address bits of the patch addresses and determining index bit positions, whereby address bits occupying the index bit positions define one or more unique tag indices; and storing the index bit positions in a tag programming memory. The system and method may furthermore comprise storing the one or more tag indices and a respectively associated one or more tag addresses in a tag control memory, forming a program index for each program address; associating each program index to a tag index; comparing the tag address associated with the tag index for each matched program index to a predetermined portion of the program address via a comparison circuit; and directing the code to patch instruction data associated with the patch address in a patch memory if the predetermined portion of the program address matches the tag address. The system and method may further comprise a RAM/ROM enable circuit operable to direct the code to the patch memory if the program address originates from the patch memory.

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