Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2008-05-27
2008-05-27
Nguyen, Chau (Department: 2619)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S468000
Reexamination Certificate
active
07379467
ABSTRACT:
Disclosed is an apparatus and method for an interface for scheduling the store-forwarding of back-to-back multi-channel packet fragments. The apparatus may include a data extraction block, a plurality of data assemblers, a scheduler, and an output memory. The scheduler may be configured to operate according to a scheduling policy. The scheduling policy may include a set of priorities to determine an order of scheduling writes to the output memory from a plurality of data assemblers. The scheduling policy may also include selecting one or more of the plurality of data assemblers having a fill level greater than twice an input data path width of an input data bus and having no end-of-packet (EOP) or start-of-packet (SOP) as a first priority, selecting one or more of the plurality of data assemblers having a fill level greater than twice the input data path width of the input data bus, and not covered in the first priority selection, as a second priority, selecting one or more of the plurality of data assemblers having a fill level greater than the input data path width of the input data bus, and not covered in the first and second priority selections, as a third priority, and selecting one or more of the plurality of data assemblers having an end-of-packet (EOP) as a fourth priority.
REFERENCES:
patent: 5136584 (1992-08-01), Hedlund
patent: 5978868 (1999-11-01), Maas
patent: 6058114 (2000-05-01), Sethuram et al.
patent: 6252887 (2001-06-01), Wallace
patent: 6513105 (2003-01-01), Pontius
patent: 6680933 (2004-01-01), Cheesman et al.
patent: 6745264 (2004-06-01), Luke et al.
patent: 6982991 (2006-01-01), Atoji
patent: 2003/0120798 (2003-06-01), Bouchard et al.
Michael Timothy Moore, Filing the WAN-communications-line card, EDN Magazine, Apr. 18, 2002, pp. 83-90.
Louis E. Frenzel, Programmable Framer Chip Improves OC-48 Efficiency, Electronic Design, Downloaded Apr. 16, 2001, 4 pages.
Nilan Ruparelia, Delivering Ethernet over Sonet using Virtual Concatenation, CommsDesign.com, http://www.commsdesign.com/story/OEG20020225S078, Feb. 25, 2002, 8 pages.
Karl Gass, Russ Tuck, Jeffrey Lynch, System Packet Interface Level 5 (SPI-5): OC-768 System Interface for Physical and Link Layer Devices, Sep. 2002, p. 1-75.
Paul Somnath
Rekhi Sanjay
Blakely , Sokoloff, Taylor & Zafman LLP
Cypress Semiconductor Corporation
Foud Hicham B
Nguyen Chau
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