Scheduling data frames for processing: apparatus, system and...

Details Scheduling data frames for processing: apparatus, system and... Scheduling data frames for processing: apparatus, system and...

2007-07-03

2007-07-03

Lane, Jack A. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S108000, C712S225000, C710S316000, C709S236000, C709S238000

Reexamination Certificate

active

10728874

ABSTRACT:
A scheduler in, for example, an off-load engine reports events for processing data frames to processing engines. Each event to report has associated to it an event information to report to a respective processing engine for processing, for example, a data frame. Responsive to a prompt having a specified time, a processor looks up the event information to report at the specified time in one or more memories. For each event information to report at the specified time, at least some of the event information is forwarded to the respective processing engine. A state machine is used as the processor to implement functionality of the scheduler in hardware thereby providing off-loading of processing in the off-load engine from software to hardware.

REFERENCES:
patent: 4656626 (1987-04-01), Yudichak et al.
patent: 6661791 (2003-12-01), Brown

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