Scatter-gather intelligent memory architecture for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S120000, C711S130000, C711S131000, C711S132000, C711S133000, C711S134000, C711S135000, C711S136000, C711S137000, C711S138000, C711S139000, C711S140000, C711S141000, C711S142000, C711S143000, C711S147000, C711S200000, C711S212000, C711S217000, C711S218000

Reexamination Certificate

active

08074026

ABSTRACT:
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion.

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Mainak Chaudhuri et al.; Cashe Coherence Protocol Design for Active Memory Systems.; Computer Systes Laboratory, Cornell University, Ithaca, NY, U.S.A.; pp. 7.

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