Scanning memory device and error correction method

Details Scanning memory device and error correction method Scanning memory device and error correction method

1998-02-10

1999-12-07

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

714711, 714718, 360 31, 360 53, G06F 1100

Patent

active

060000473

ABSTRACT:
A high-data density, high-data rate scanning memory device reads and writes data using a plurality of probes. The scanning memory device comprises a memory composed of a matrix of cell arrays each containing a submatrix of memory cells, a plurality of probes having a one-to-one correspondence to each cell array, and a positioning device that operates to simultaneously change the positions of probes relative to the cell arrays. Each of the cell arrays has a cell array status memory for storing information designating whether the cell array is functional or whether the cell array is defective. If the number of defective memory cells detected within each cell array exceeds some predetermined number, the cell array is designated as defective. Defective cell arrays are logically replaced by functional cell arrays. Error correction is applied to the data to reduce reading and writing errors by the scanning memory device and to maintain the integrity of data stored in the memory.

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Chen, Peter M. et al., "RAID: High Performance, Reliable Secondary Storage", ACM Computing Surveys, vol. 26, No. 2, Jun. 1994, pp. 145-185.

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