Scanning line driving circuit, display device, and...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S082000, C326S080000, C326S081000

Reexamination Certificate

active

11067887

ABSTRACT:
To reduce a voltage applied to a scanning line driving circuit. Buffer circuits respectively connected to gate electrodes of an N-channel transistor and a P-channel transistor which are connected to the scanning lines are provided and driving voltages are made different from each other, such that voltages applied to the buffer circuits are reduced.

REFERENCES:
patent: 5723986 (1998-03-01), Nakashiro et al.
patent: 6157361 (2000-12-01), Kubota et al.
patent: 6670944 (2003-12-01), Ishii
patent: A-2000-163003 (2000-06-01), None
patent: A-2001-265297 (2001-09-01), None

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