Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate
2000-06-21
2001-03-13
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having fuse element
C365S189050
Reexamination Certificate
active
06201750
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
This invention generally relates to integrated circuits on semiconductors, and more specifically relates to scannable fuse latches on these circuits.
2. Background Art
An on-chip fuse on an integrated circuit is a device that can be permanently set. When the fuse is initially created, it is essentially a “short”, meaning that there is very little or no electrical resistance from one end to the other of the fuse. The fuse may be left this value, which is a logic zero. Alternatively, the fuse may be “blown” to become a logic one. In this state, there is a very high or infinite resistance from one end to the other of the fuse. Generally, a destructive process is used to blow the fuse.
On-chip fuses are used for various reasons. One reason is to provide an identity, which can provide the manufacturer valuable information about when and where the semiconductor chip was made. Another reason is to provide configuration bits, which permanently configure the chip. A final exemplary reason is to provide “remapping” of Random Access Memory (RAM) cells. When a RAM semiconductor chip is made, more RAM cells than needed are actually made on the chip. When bad RAM cells are found through testing, the good, extra RAM cells are “remapped” so that they are used instead of the bad RAM cells. The chip is retested and this process continues until the RAM chip completes an error-free test.
While fuses provide definite benefits to integrated circuit manufacturers, designers, and failure engineers, there are problems with the current fuses and their accessing mechanisms.
DISCLOSURE OF THE INVENTION
The preferred embodiments of the present invention provide scannable fuse latches that can override current fuse values, read current fuse values, and latch current fuse values. Using the scannable fuse latches of the current invention allows current fuse values to be overridden, which can be important in testing and failure analysis to place the integrated circuit in a known state. The scannable fuse latches of the current invention also allow current fuse values to be read. This aids failure analysis because the current state of the failed integrated circuit can be determined. Finally, the scannable fuse latches of the present invention allow the current state of fuses to be latched and provided to a core of an integrated circuit.
The foregoing and other features and advantages of the present invention will be apparent from the following more particular description of the preferred embodiment of the invention, as illustrated in the accompanying drawings.
REFERENCES:
patent: 5313424 (1994-05-01), Adams et al.
patent: 5654649 (1997-08-01), Chua
patent: 5764878 (1998-06-01), Kablanian et al.
patent: 5789970 (1998-08-01), Denham
patent: 5914906 (1999-06-01), Iadanza et al.
patent: 6125069 (2000-09-01), Aoki
Busch Robert E.
Towler Fred J.
Wistort Reid A.
Capella Steven
International Business Machines - Corporation
Le Vu A.
Schmeiser, Olson & Watt
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