Scan friendly domino exit and domino entry sequential circuits

Details Scan friendly domino exit and domino entry sequential circuits Scan friendly domino exit and domino entry sequential circuits

2007-06-05

2007-06-05

Le, Don (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S093000

Reexamination Certificate

active

11201559

ABSTRACT:
A circuit for converting received domino logic signals to a static output signal includes a pair of logic gates having inputs and outputs that are cross-coupled and responsive to a domino logic input signal and a clock signal to latch the input signal during an evaluation phase defined by the clock signal. A static output is based on the latched value. One of the logic gates is tri-stateable to establish a value at the static output during a scan mode. A circuit for converting received static logic signals into domino logic signals includes a latch responsive to a clock signal to latch the value of a data signal at a predefined clock transition. A conversion circuit produces a domino logic output signal in response to the clock signal and the latched value of the data signal. A latch component is tri-stateable to establish a value at the output.

REFERENCES:
patent: 6329867 (2001-12-01), Penney et al.
patent: 6356107 (2002-03-01), Tang et al.
patent: 6456115 (2002-09-01), Li et al.
patent: 6522171 (2003-02-01), Hanson et al.
patent: 6563343 (2003-05-01), Patel et al.
patent: 2006/0006900 (2006-01-01), Kinkade et al.
patent: 2006/0244486 (2006-11-01), Ruesch

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