Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-03-30
2010-02-02
Puente, Emerson C (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S030000, C714S726000, C714S727000, C714S729000, C324S765010
Reexamination Certificate
active
07657790
ABSTRACT:
Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The received scan frames contain stimulus data to be applied to circuitry within the device to be tested, a command for enabling a test control operation, and a frame marker bit to indicate the end of the scan frame pattern. The inputting of scan frames can occur continuously and simultaneous with a commanded test control operation.
REFERENCES:
patent: 5526365 (1996-06-01), Whetsel
patent: 5606566 (1997-02-01), Whetsel
patent: 5831922 (1998-11-01), Choi
patent: 6389565 (2002-05-01), Ryan et al.
patent: 6769080 (2004-07-01), Whetsel
Bassuk Lawrence J.
Brady W. James
Puente Emerson C
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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