Excavating
Patent
1995-03-17
1996-10-22
Voeltz, Emanuel T.
Excavating
371 221, 371 225, 324 731, 324500, 324537, 326 16, G01R 3127
Patent
active
055684939
ABSTRACT:
An integrated circuit containing analogue operation circuitry having a plurality of nodes for input and output of signals during normal operation, a plurality of scan cells connected to at least said plurality of nodes for containing signals to be utilized in selected tests to be performed on said analogue operation circuitry and responsive to selected output signals is provided. A method for testing a module of analogue circuitry incorporated into an integrated circuit having other circuitry by decoupling a plurality of module signal terminals from respective normal operation connections to a plurality of scan cells, and inputting at least portions of test suites and sensing test result output signals through at least selected ones of said scan cells is provided.
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"A Survey of Design for Testability Scan Techniques", by E. J. McCluskey, VLSI Design (vol. 5, No. 12, pp. 38-61, Dec. 1984).
Kesterson James C.
Laws Gerald E.
McClure C. Alan
Miller Craig Steven
Texas Instruments Incorporated
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