Scaled interconnect anodization for high frequency applications

Details Scaled interconnect anodization for high frequency applications Scaled interconnect anodization for high frequency applications

1998-09-08

2000-03-07

Thomas, Tom

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438614, 438622, 438642, 438644, 438688, 257664, 257728, 257753, 257765, H01L 21302, H01L 21306, H01L 21316, H01L 213205, H01L 21326

Patent

active

060339829

ABSTRACT:
A method of forming a conductive line structure is provided. An adhesion layer is formed on a substrate surface. A seed layer is formed on the adhesion layer. A conductor is formed on the seed layer to form a partially complete structure. The partially complete structure is exposed to an electrolyte and undergoes an anodization process. At least a portion of the seed layer and a portion of the conductor are transformed to seed layer metal oxide and conductor metal oxide, respectively. At least a portion of the adhesion layer is transformed to an adhesion layer metal oxide and a further portion of the conductor is transformed to the conductor metal oxide. An outer metal layer is formed over the seed layer metal oxide and the conductor metal oxide.

REFERENCES:
patent: 4456506 (1984-06-01), Stein et al.
patent: 5300209 (1994-04-01), Mori
patent: 5441618 (1995-08-01), Matsuda et al.
patent: 5481084 (1996-01-01), Patrick et al.
patent: 5733420 (1998-03-01), Matsuda et al.

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