Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Reexamination Certificate
2008-03-25
2008-03-25
Kim, Kenneth S. (Department: 2111)
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
C712S003000, C712S004000, C712S022000
Reexamination Certificate
active
07350057
ABSTRACT:
Described herein is a method and system for executing instructions. The system comprises a scalar unit for executing scalar instructions each defining a single value pair; a vector unit for executing vector instructions each defining multiple value pairs; and an instruction decoder for receiving a single stream of instructions including scalar instructions and vector instructions and operable to direct scalar instructions to the scalar unit and vector instructions to the vector unit. The vector unit can comprises a plurality of value processing units and a scalar result unit. The scalar unit can comprise a scalar register file. Communication between the vector unit and the scalar unit is enabled by allowing the vector unit to access the scalar register file and allowing the scalar unit to access output from the scalar result unit. The output of the scalar result unit may be based on the relative magnitudes of outputs from the plurality of value processing units.
REFERENCES:
patent: 5517666 (1996-05-01), Ohtani et al.
patent: 5778241 (1998-07-01), Bindloss et al.
patent: 6324638 (2001-11-01), Elmer et al.
Bailey Neil
Barlow Stephen
Plowman David
Ramsdale Timothy
Swann Robert
Broadcom Corporation
Kim Kenneth S.
McAndrews Held & Malloy Ltd.
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