Scalable split-gate flash memory cell with high...

Details Scalable split-gate flash memory cell with high... Scalable split-gate flash memory cell with high...

2005-03-24

2009-10-27

Jackson, Jr., Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21681, C438S267000

Reexamination Certificate

active

07608884

ABSTRACT:
A system and method provides an improved source-coupling ratio in flash memories. In one embodiment, a flash memory cell system with high source-coupling ratio includes at least a conventional floating gate device having a floating gate, a drain and a source. The floating gate is formed over a first junction for charging the floating gate by electron injection from the source to the floating gate and at least a first dielectric is layered on top of the floating gate to form a second junction. At least a first polycrystalline silicon is layered on top of the first dielectric, the first polycrystalline silicon electrically connected to the source. Electron tunneling provided through the second junction to the floating gate charges the floating gate, thereby increasing the source-coupling ratio of the floating gate and increasing the efficiency of storing electrical charge.

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