Scalable packet processing systems and methods

Details Scalable packet processing systems and methods Scalable packet processing systems and methods

2008-07-01

2008-07-01

Bullock, Jr., Lewis A. (Department: 2195)

Electrical computers and digital processing systems: virtual mac

Task management or control

Process scheduling

C712S001000, C712S220000, C712S225000

Reexamination Certificate

active

07395538

ABSTRACT:
A data processing architecture includes multiple processors connected in series between a load balancer and reorder logic. The load balancer is configured to receive data and distribute the data across the processors. Appropriate ones of the processors are configured to process the data. The reorder logic is configured to receive the data processed by the processors, reorder the data, and output the reordered data.

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