Scalable I/O signaling topology using source-calibrated...

Details Scalable I/O signaling topology using source-calibrated... Scalable I/O signaling topology using source-calibrated...

2006-11-07

2006-11-07

Perveen, Rehana (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

System configuring

C365S226000

Reexamination Certificate

active

07133945

ABSTRACT:
An embodiment of the invention is a scalable I/O interface signaling technology for improved communication between semiconductor devices. In one embodiment, a system contains a first semiconductor device that includes a first characterization mechanism, a control logic coupled to the first characterization mechanism, a voltage generating mechanism coupled to the control logic and a transmit buffer. The control logic adjusts at least a first voltage generated by the voltage generating mechanism based on at least a value determined by the first characterization mechanism. The first voltage is coupled to the transmit buffer to define at least a transmit voltage signal level. In an alternate embodiment, the first voltage is coupled to a receive buffer in a second semiconductor device to define at least a receive voltage signal level.

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