Scalable disk array controller

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S004000

Reexamination Certificate

active

07111120

ABSTRACT:
This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed.Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.A disk array controller according to this invention comprises an interface platter on which a channel interface section and a disk interface section are mounted, a memory platter on which a shared memory section is mounted, and a cable which connects the interface platter to the memory platter in order to solve the above problems.

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patent: 6006296 (1999-12-01), Gold et al.
patent: 6115764 (2000-09-01), Chisholm et al.
patent: 6385681 (2002-05-01), Fujimoto et al.
patent: 6477619 (2002-11-01), Fujimoto et al.
patent: 720994 (1995-01-01), None

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