Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-11-22
2005-11-22
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S004000
Reexamination Certificate
active
06968426
ABSTRACT:
This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed.Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.A disk array controller according to this invention comprises an interface platter on which a channel interface section and a disk interface section are mounted, a memory platter on which a shared memory section is mounted, and a cable which connects the interface platter to the memory platter in order to solve the above problems.
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Fujibayashi Akira
Fujimoto Kazuhisa
Minowa Nobuyuki
Hitachi , Ltd.
Mattingly ,Stanger ,Malur & Brundidge, P.C.
McLean-Mayo Kimberly
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