Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-10-04
2005-10-04
Liu, Shuwang (Department: 2634)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S275000, C375S355000, C341S061000, C341S123000
Reexamination Certificate
active
06952461
ABSTRACT:
A sampling frequency conversion apparatus which easily controls the phase difference (time difference) between the input data and the output data in converting the sampling frequency, includes a storage device13for continuously writing the input data or the data obtained by over-sampling the input data and for continuously reading out the data written maintaining a predetermined address difference relative to the writable address, and an interpolation processing unit14for interpolating the data read-out from the storage device13to obtain data of which the sampling frequency is converted. In converting the sampling frequency, an address difference between a writable address and a readable address in the storage device13is optimized, the address difference being optimized without limitation for a predetermined period of time from the start of supplying the input data and, then, being optimized by imposing a predetermined limitation after the passage of the predetermined period of time.
REFERENCES:
patent: 5191334 (1993-03-01), Yasuda
patent: 5835032 (1998-11-01), Yasuda
patent: 5982305 (1999-11-01), Taylor
patent: 5996044 (1999-11-01), Yasuda
Ohkuri Kazunobu
Yasuda Nobuyuki
Liu Shuwang
Wang Ted M.
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