Sampling clock signal recovery device and method in receiving te

Details Sampling clock signal recovery device and method in receiving te Sampling clock signal recovery device and method in receiving te

1997-03-11

2000-08-08

Ghebretinsae, Temesghen

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

375371, 375376, H04C 700

Patent

active

061012300

ABSTRACT:
A sampling clock signal recovery device and method for providing the sampling clock signal recovery device, in a receiving terminal of a discrete multitone (DMT) system, for accurately recovering a sampling clock signal by reducing sampling-induced jitter noise, i.e., by removing additive white Gaussian noise (AWGN) from the receiving terminal of the DMT system, and stably recovering a sampling clock signal. The above is accomplished by determining whether the phase error is smaller than a predetermined threshold value. If the phase error is equal to, or greater than the predetermined threshold value, then the instant invention corrects the sampling clock signal by the phase error. However, if the phase error is less than the predetermined threshold value, then the instant invention calculates an average value of some or all of decision error values, and corrects the sampling clock signal by the average value. Thus, a sampling clock signal is more accurately recovered.

REFERENCES:
patent: 4423518 (1983-12-01), Hirosaki
patent: 4910465 (1990-03-01), Dillman
patent: 5257293 (1993-10-01), Taguchi
patent: 5519733 (1996-05-01), Huang
patent: 5862191 (1999-01-01), Moridi

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