SAM data selection on dual-ported DRAM devices

Details SAM data selection on dual-ported DRAM devices SAM data selection on dual-ported DRAM devices

1991-11-12

1993-10-26

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Multiple port access

36518912, 365239, G11C 800

Patent

active

052572374

ABSTRACT:
The selection in a dual port memory device of data from a serial access memory register having a lower byte and an upper byte of data is described herein. In one embodiment, the register is partitioned lengthwise into two sections, corresponding to, for example, a frame buffer A and a frame buffer B. On each serial clock cycle, frame buffer A or frame buffer B for each byte of data may be selected from the register. Each of the selected bytes of data are then passed to a serial output port. In another embodiment, the lower byte of data corresponds to, for example, a frame buffer A and the upper byte corresponds to a frame buffer B. Then either the upper byte or lower byte of data is selected to be output on the serial port. In yet a further embodiment, the serial access memory register is partitioned lengthwise into two sections, each section corresponding to, for example, a frame buffer and the bytes of data correspond to another buffer, then either the lower byte or upper byte is selected to be output on the serial port.

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