Salicided MOS device and one-sided salicided MOS device, and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S291000, C257S292000, C257S298000, C257S300000, C257S301000

Reexamination Certificate

active

06897504

ABSTRACT:
A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer and first and second doped regions. The second MOS has a second gate structure, a second spacer and third and fourth doped regions. Anisotropic etching is performed to remove part of the organic layer until the oxide layer on the first and the second gate structures is exposed, wherein a remaining organic layer is left above the substrate. The oxide layer on the first and the second gate structures is removed. The remaining organic layer is removed. The oxide layer on the first, second, and third doped regions is removed. Thus, a silicide layer cannot form on the fourth doped region.

REFERENCES:
patent: 6040593 (2000-03-01), Park
patent: 6063706 (2000-05-01), Wu
patent: 6194258 (2001-02-01), Wuu
patent: 6277683 (2001-08-01), Pradeep et al.
patent: 6337240 (2002-01-01), Chu

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