Sacrificial CVD germanium layer for formation of high aspect rat

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257767, 257768, 257770, H01L 2348

Patent

active

056441665

ABSTRACT:
A high aspect ratio submicron VLSI contact and corresponding method of manufacture is disclosed. The contact is formed through an insulative layer, such as silicon dioxide, to an underlying active region on a substrate of silicon wafer. The contact comprises a layer of titanium germanosilicide at the bottom of the contact opening, and a layer of titanium germanide at the sides of the contact opening, with an overlying layer of titanium nitride. The contact is metallized, preferably using tungsten or aluminum. The disclosed method of manufacturing the contact comprises first etching the contact opening, then exposing the bottom of the contact opening to germane gas to clean native silicon dioxide from the bottom of the contact opening. A 50 Angstrom layer of germanium is then deposited over the contact opening. A layer of titanium is then deposited over the germanium layer in the contact opening. The deposition of titanium is preferably accomplished using a collimator having an aspect ratio lower than about 2.5:1. After annealing in a nitrogen atmosphere, the contact is metallized with tungsten or aluminum. The anneal step can be conducted at a temperature of around 600.degree. C. Less titanium may be used than with conventional processes, allowing a higher aspect ratio of the contact opening as well as the use of the collimator having a lower than conventional aspect ratio.

REFERENCES:
patent: 5401674 (1995-03-01), Anjum et al.

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