Sacrificial corner structures

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief

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Details

257747, 257420, H01L 2313, H01L 2318

Patent

active

055720676

ABSTRACT:
An integrated circuit chip die (12) is manufactured with sacrificial structures (16) placed at the areas of die that are likely to experience cracks. According to one embodiment of the invention, these sacrificial structures are placed at the corners of the die. The sacrificial structures are constructed with metal lines (22, 24) that resist propagation of cracks into the area of the die containing electronic devices. The metal lines form lattice steps so that the surface of the die will more tightly bond to the molding compound that makes up the die package.

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P. Nixon et al., "Shear Stress Damage to Chips: A Design Solution," TI Technical Journal, Jun. 1988, pp. 96-105.
R. E. Thomas, "Stress-Induces Deformation of Aluminum Metallization in Plastic Molded Semiconductor Devices," Materials Technology Laboratory, SRDL, Technical Report No. MTL-85-45 (Motorola) Mar. 11, 1985, pp. 1-26.
R. Foehringer et al., "Thin Film Cracking in Plastic Packages Analysis, Model and Improvements," Intel Corporation, 0569-5503/91/0000-0759-0764, 1991, IEEE.

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