Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-10-01
2003-04-01
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
Reexamination Certificate
active
06541399
ABSTRACT:
BACKGROUND OF THE INVENTION
(1). Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method to improve temperature control of a wafer that is being processed and to therewith improve process uniformity.
(2). Description of the Prior Art
One of the more important control parameters that is applied during the processing of semiconductor devices is the temperature of the wafer. Thermally controlled processing procedures that are part of creating a semiconductor device include for instance thermal oxidation, dopant diffusion, epitaxy and thermal annealing, nitridation, the process of forming salicided surfaces, methods of Chemical Vapor Deposition (CVD) and the like. The process of CVD is widely applied in for instance the formation of dielectric layers containing oxides and nitrides, the creation of layers of amorphous silicon and polysilicon and for the creation of conductive layers of metal that are subsequently patterned and etched to form metal interconnect lines.
The above cited semiconductor procedures and others are highly temperature dependent, which leads to the requirement of good temperature control during the performance of these procedures. This temperature control can be implemented using a variety of methods. For instance, exposing both surfaces of a wafer to heating lamps that are part of a thermal reactor. By adjusting a controller of the thermal reactor, a control that can be implemented via the implementation of a closed loop feedback mechanism that is driven by the measured temperature of the wafer, adjustments can be made to the heating lamps in order to provide the desired temperature of the wafer that is being processed.
Another method that can be applied for the control of the temperature of a semiconductor wafer is to place the wafer over the surface of a heater or heated pedestal, heating a first surface of the wafer. Gasses that are deposited on the second surface of the wafer are released through multiple openings in a cover plate, which can further be used for heating the second surface of the wafer. In using this arrangement, it is clear that thermal coupling between the temperature controlling elements of the arrangement, that is the heated pedestal and the cover plate, must be uniform and equally distributed over the first and the second surface of the wafer. Any interruptions in this thermal coupling with either the first or the second surface of the wafer leads to undesirable gradients of temperature distribution over the surface of the wafer and must therefore be avoided. Due to the elevated temperatures of the heated pedestal and the cover plate, these elements of the heating arrangement tend to warp which introduces into this method of heating exactly those conditions of heating that are to be avoided for the reasons stated. In applying the method of heating a wafer where a heated pedestal and the cover plate are applied, a better method must therefore be provided to control how the heat is applied to the wafer and the effectiveness of this heat application. The invention provides such a method by observing parameters of thickness of a layer of deposited material on the surface of the substrate and by using these parameters of thickness as a gauge of the actual conditions of temperature across the face of the wafer.
U.S. Pat. No. 6,136,388 (Raoux) and U.S. Pat. No. 6,162,709 (Raoux et al.) show AMAT centura and describe cover plates.
U.S. Pat. No. 6,126,744 (Hawkins) and U.S. Pat No. 6,156,149 (Cheung et al.) are related patents.
SUMMARY OF THE INVENTION
A principle objective of the invention is to provide an accurate and dependable method of monitoring the temperature profile over the surface of a semiconductor substrate.
Another objective of the invention is to provide a method of controlling temperature over the surface of a semiconductor substrate whereby concerns of warpage of heating elements are eliminated.
Yet another objective of the invention is to provide a method of controlling temperature over the surface of a semiconductor that is easy to implement and easy to control.
A still further objective of the invention is to provide a method of controlling temperature over the surface of a semiconductor that assures good gap filling of deposited layers of dielectric, specifically a layer of sub-atmospheric tetra-ethyl-ortho-silicate-ozone BPSG (SABPSG).
In accordance with the objectives of the invention a new method is provided of measuring actual temperatures across the surface of a semiconductor wafer. The thickness of a layer of Sub-Atmospheric TEOS Undoped Silicon Glass (SAUSG) is used to monitor the temperature distribution across the surface of a silicon substrate.
REFERENCES:
patent: 5963840 (1999-10-01), Xia
patent: 6126744 (2000-10-01), Hawkins et al.
patent: 6136388 (2000-10-01), Raoux et al.
patent: 6156149 (2000-12-01), Cheung et al.
patent: 6162709 (2000-12-01), Raoux et al.
patent: 6348099 (2002-02-01), Xia
Hung Mong-Chi
Wu Pin-Huan
Yang Cheng-Lung
Ackerman Stephen B.
Niebling John F.
Saile George O.
Stevenson Andrée C.
Taiwan Semiconductor Manufacturing Company
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