S-capacitance switching circuit for a video display

Details S-capacitance switching circuit for a video display S-capacitance switching circuit for a video display

1986-05-30

1987-11-24

Blum, Theodore M.

Electric lamp and discharge devices: systems

Cathode ray tube circuits

Cathode-ray deflections circuits

315370, H01J 2970

Patent

active

047091932

ABSTRACT:
A deflection circuit generates a deflection current at a scan frequency selected from any one of at least two ranges of frequencies. When the scan frequency is selected from the first range, only a first S-capacitor provides S-correction. When the scan frequency is selected from a lower second range, a series connected FET switch couples a second S-capacitor across the first S-capacitor. A DC average voltage is developed at a junction between the first and second S-capacitors. A resistor coupled to the second S-capacitor causes the second S-capacitor to be charged to the average DC voltage to prevent the average DC voltage from developing across the main current conducting electrodes of the FET switch when the FET switch is nonconductive. The FET switch is controlled by an output voltage of a comparator. The comparator is responsive to a signal that is indicative of the frequency range from which the scan frequency is selected. The comparator utilizes positive feedback to provide hysteresis that prevents switch bounce of the FET switch when the signal is in the vicinity of the threshold of the comparator.

REFERENCES:
patent: 4501995 (1985-02-01), Olmstead et al.
patent: 4533855 (1985-08-01), Willis et al.
patent: 4536684 (1985-08-01), Babcock

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