Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
2002-02-14
2003-06-10
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C438S760000, C438S243000, C118S724000
Reexamination Certificate
active
06576565
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to the fabrication of integrated circuits (IC's), and more particularly to the conformal deposition of materials onto high-aspect-ratio three dimensional (3D) microstructures.
BACKGROUND
Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, as examples. The deposition of a film on the surface of a semiconductor substrate is a common step in semiconductor processing. Typically, selected chemical gases are mixed in a deposition chamber containing the semiconductor substrate. Usually, heat is applied to drive the chemical reaction of the gases on the surface of the substrate on which the film is deposited.
A semiconductor memory device is a semiconductor product widely used in electronic systems for storing data. A common type of semiconductor memory device is a dynamic random access memory (DRAM). A DRAM typically includes millions or billions of individual DRAM cells, with each cell storing one bit of data. A DRAM memory cell typically includes an access field effect transistor (FET) and a storage capacitor. The access FET allows the transfer of data charges to and from the storage capacitor during reading and writing operations. In addition, the data charges on the storage capacitor are periodically refreshed during a refresh operation. The semiconductor industry in general is being driven to decrease the size of semiconductor devices located on integrated circuits. Miniaturization is generally needed to accommodate the increasing density of circuits necessary for today's semiconductor products.
The desire for even higher levels of circuit integration has stimulated three-dimensional integration. Indeed, if devices can be stacked on top of each other, a higher number of the devices can be integrated per unit of chip area. For instance, instead of planar capacitors, deep trench capacitors are extensively used in DRAM and embedded DRAM (eDRAM) memory cells to reduce the cell area.
A 3D cell capacitor is basically formed by first creating a deep trench in a silicon substrate, forming a first electrode, depositing a thin conformal dielectric film inside the trench, and then filling the trench with doped polycrystalline silicon (polysilicon) to form the other electrode of the capacitor. Continuous 3-D scaling of memory cells requires narrow deep trenches having aspect ratios (the ratio of the depth of the trench to the width of the trench opening) of 10:1 and greater.
In some cases, bottle-shaped trenches are employed to increase the trench surface area while keeping constant opening. Filling high-aspect-ratio 3-D microstructures with polysilicon is particularly difficult. Enhanced polysilicon growth on top of the wafers than on the sides of the trenches causes polysilicon bread-loafing and pinching off at the trench top, leaving voids in the lower part of the trenches. Generally, there is a continuous need for processes and tools that allow conformal deposition of material onto high-aspect-ratio (3-D) structures.
There are a variety of methods for improving film conformality in the art. A number of physical parameters are known to be responsible for controlling the conformality of a deposited film. For example, S. Wolf and R. N. Tauber, in the process technology reference book “
Silicon Processing for the VLSI Era
, Volume
1
Process Technology” by, 2
nd
edition, Lattice Press, Sunset Beach, Calif. 2000, at pp. 194-198 summarize the conformal deposition of thin films. Wolf et al. teach that there are three physical parameters responsible for controlling the conformality of a deposited film: adatom migration, re-emission of radicals and molecules, and molecular mean free pass in the process gas.
Adatom migration refers to the process of transporting adsorbed molecules along wafer surface before final attachment or chemisorption. The higher the adatom mobility, the longer the molecule can travel along a microstructure surface, and the better the film conformality. Re-emission refers to the molecular transport by multiple wall collisions due to a low sticking coefficient. If an active molecule can repeatedly bounce off the microstructure surface, it can be more easily delivered to a remote corner of the microstructure. Accordingly, the lower the sticking coefficient, the higher the re-emission rate, and the better the film conformality. Molecular mean free pass in the process gas determines the gas phase transport of active chemicals to various parts of a microstructure. If the mean free pass is substantially larger than all dimensions of a microstructure, then active molecules travel along straight lines without any gas phase scattering within the microstructure.
In this regime, the rates of re-emission and adatom migration must be high enough to overcome the effect of geometrical shadowing. If the mean free pass is substantially smaller than the microstructure, then active gas molecules experience gas phase scattering within the microstructure. In this regime, the flux of active chemicals is a function of the arrival angle range. The wider the arrival angle range, the higher the flux.
For instance, an upper corner of a trench has the range of between 0 and 270 degrees, while the bottom corner of a trench has the range of between 0 and 90 degrees. If there is little adatom migration, then the upper corner would have thicker film, causing pinch-off.
Wolf et al. also teach the selection of processing parameters for reducing or eliminating non-conformal deposition. Accordingly, the adatom mobility may be increased by (a) raising substrate temperature, and (b) supplying high-energy particles (e.g. ions, electrons, photons, etc.) during the deposition. It is also known in the art that the adatom mobility can be affected by the surface coverage with active chemicals. In general, a lower partial pressure of a chemical may lead to a lower surface coverage by the chemical. However, depending on a particular chemical, the adatom mobility may either increase or decrease with the surface coverage. Consequently, the adatom mobility may be altered by changing pressure or partial pressure. Wolf et al. also teach that the rate of re-emission can be increased by selecting an active chemical with low sticking coefficient.
For example, a deposition of polysilicon onto high-aspect-ratio structures is typically conducted at low pressure and relatively high temperature. A typical pressure range of 0.2 to 1 Torr ensures a relatively low growth rate. The mean free pass is approximately between 2 mm and 400 &mgr;m. The mean free pass is substantially larger than the typical size of a microstructure which is e.g., from 100 nm to 10 &mgr;m. A typical temperature range of from 600 degrees C. to 700 degrees C. provides an acceptable surface mobility and re-emission rate. A typical growth rate is from 0.5 to 5 Angstroms per minute. It is the low growth rate in comparison to the rates of re-emission, adatom migration, and gas phase delivery of chemicals that provides a conformal deposition of polysilicon film.
Typically, filling a deep trench with polysilicon is accomplished in a vertical furnace. A vertical furnace is a batch-type reactor which can process up to 200 substrates at once. Due to the large batch size, a vertical furnace can be used for low growth rate processes. Furnace processes usually give very conformal films; however, small seam voids may be formed at the middle or lower part of the trenches, especially in high aspect ratio trenches, which is undesirable.
Another goal in the fabrication of semiconductors is to increase the flexibility of manufacturing lines by allowing processing of various products at the same time. Reduction of processing time in the presence of different products can be achieved with a smaller batch size, preferably single wafer fabrication, for example. In addition, recent trends in microfabrication are directed toward reduced thermal budget and processing of large substrates.
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