Row redundancy circuit

Details Row redundancy circuit Row redundancy circuit

2006-06-27

2006-06-27

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S185090, C365S185170, C365S230030, C365S230060, C365S225700

Reexamination Certificate

active

07068553

ABSTRACT:
A row redundancy circuit includes a fuse box group array, a redundant row predecoder and a redundant sub-row decoder. The fuse box group array includes a plurality of fuse box groups to detect row addresses. The redundant row predecoder performs a logic operation on an output signal from the fuse box groups to selectively activate a redundant main wordline corresponding to a plurality of redundant sub-wordlines. The redundant sub-row decoder performs a logic operation on output signals from the fuse box groups, which are classified into group signals corresponding to the number of fuse boxes in each fuse box group, to output a boosting signal for selectively activating the plurality of sub-wordlines corresponding to the each redundant main wordline. In the row redundancy circuit, the current consumption due to generation of unnecessary boosting signals can be minimized because the boosting signal is prevented from being disabled and then enabled in every precharge mode.

REFERENCES:
patent: 5373475 (1994-12-01), Nagase
patent: 6920073 (2005-07-01), Lee
patent: 2001-65069 (2001-07-01), None
patent: 2003-22611 (2003-03-01), None

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