Row address control circuit in semiconductor integrated...

Details Row address control circuit in semiconductor integrated... Row address control circuit in semiconductor integrated...

2006-12-28

2009-10-13

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230060, C365S189090, C365S230030

Reexamination Certificate

active

07602662

ABSTRACT:
Disclosed are a row addresses control circuit of a semiconductor integrated circuit and method of controlling row addresses using the same. The circuit includes: a pulse generator receiving a bank active signal to generate a bank active pulse signal; a refresh mode input circuit combining the bank active pulse signal with a refresh signal to generate a refresh combination signal; and a plurality of row address control units driving and latching each global row enable signal to convert the global row enable signal to a local row enable signal in response to an input of the refresh combination signal.

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