ROM type semiconductor memory device with large operating margin

Details ROM type semiconductor memory device with large operating margin ROM type semiconductor memory device with large operating margin

1996-09-30

1998-02-10

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including signal comparison

36518909, 365210, 3651852, G11C 700, G11C 702, G11C 1134

Patent

active

057176400

ABSTRACT:
In a semiconductor memory device including a memory cell array, a sense amplifier for sensing a voltage of a selected one of read-only memory cells of the memory cell array, a dummy memory cell array, a reference voltage generating circuit for sensing a voltage at the output of the dummy memory cell array, and a comparator for comparing a sense voltage of the sense amplifier with a reference voltage of the reference voltage generating circuit, a bias circuit supplies a bias current from a power supply terminal to the output of the sense amplifier and also supplies a bias current from the power supply terminal to the output of the reference voltage generating circuit.

REFERENCES:
patent: 4761765 (1988-08-01), Hashimoto
patent: 5241505 (1993-08-01), Hashimoto
patent: 5293333 (1994-03-01), Hashimoto
patent: 5305260 (1994-04-01), Ninomiya
patent: 5555217 (1996-09-01), Hashimoto

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