ROM device having shaped gate electrodes and corresponding code

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257903, H01L 2711

Patent

active

059947454

ABSTRACT:
A process of fabricating a mask type ROM is described wherein second type impurity ions are implanted into a semiconductor substrate having a first opposite type background impurity to form a depletion region adjacent the surface. A plurality of parallel nitride lines are formed on the surface, and a first gate oxide formed on the spaces between the nitride lines. Subsequently, a first layer of doped polycrystalline silicon is deposited over the nitride lines, and the layer etched back to expose the top surfaces of the nitride lines. After the nitride lines are removed, a thin gate oxide layer is formed on the exposed surface of the substrate, and on the surfaces of the resultant first polycrystalline gate electrode lines. A second layer of doped polycrystalline silicon is deposited over the polycrystalline silicon lines, and it is etched back. The etch back of the first, and also the second polycrystalline silicon layers, produces an elongated central depression in each of the resultant lines. Then a layer of insulating material is deposited over the surface. A photoresist layer is deposited on the surface of the insulating layer exposed, and developed to define the desired code implant pattern.

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patent: 5587600 (1996-12-01), Yang

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