ROM bit sensing

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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Details

365207, 36523006, 365203, G11C 1604

Patent

active

059301805

ABSTRACT:
A read only memory including: a plurality of memory cells arranged in x rows and y columns in an array; x wordlines each connected to y memory cells in a respective row; y bitlines each associated with x memory cells in a respective column; m reference bitlines each corresponding to n bitlines, each of the reference bitlines having x reference cells each connected to a respective wordline; and m sense amplifiers each having a first input terminal connected to a respective n bitlines and having a second input terminal connected to one of the reference bitlines, and each being responsive to a difference between a signal on one of the n bitlines and a signal on one of the reference bitlines.

REFERENCES:
patent: 4541077 (1985-09-01), Rapp
patent: 4651302 (1987-03-01), Kimmel et al.
patent: 5103116 (1992-04-01), Sivilotti et al.
patent: 5297093 (1994-03-01), Coffman
patent: 5619449 (1997-04-01), McIntyre
patent: 5703820 (1997-12-01), Kohno

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