ROM-based memory testing

Details ROM-based memory testing ROM-based memory testing

2006-06-07

2008-01-29

Pham, Ly Duy (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C714S030000, C714S702000, C714S715000, C714S720000, C714S733000

Reexamination Certificate

active

07324392

ABSTRACT:
This invention uniquely partitions the pBIST ROM for storing program and data information. The pBIST unit selectively loads both the algorithm and data, the algorithm only or the data only for each test set stored in the pBIST ROM into read/write registers. These registers are memory mapped readable/writable. A configuration register has an algorithm bit and a data bit which determines whether the corresponding algorithm or data is loaded from the pBIST ROM. The pBIST unit includes another configuration register having one bit corresponding to each possible test set stored in the pBIST ROM. The pBIST unit runs a test set if the corresponding bit in the configuration register has a first digital state.

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