Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-03-08
2005-03-08
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
06865695
ABSTRACT:
A computer system of a number of processing nodes operate either in a loop configuration or off of a common bus with high speed, high performance wide bandwidth characteristics. The processing nodes in the system are also interconnected by a separate narrow bandwidth, low frequency recovery bus. When problems arise with node operations on the high speed bus, operations are transferred to the low frequency recovery bus and continue there at a slower rate for recovery operations. The recovery technique may be used to increase system speed and performance on a dynamic basis.
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Arimilli Ravi Kumar
Chung Vicente Enrique
Joyner Jody Bern
Lewis Jerry Don
Beausoliel Robert
Dillon & Yudell LLP
International Business Machines Corpoation
Maskulinksi Michael
Salys Casimer K.
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