Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Reexamination Certificate
2006-07-04
2006-07-04
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
C710S060000, C710S117000, C713S300000, C713S310000, C713S330000, C713S500000, C713S502000, C713S600000, C375S213000, C370S535000
Reexamination Certificate
active
07072999
ABSTRACT:
A robust packet arrival time detector using a power estimate to validate a packet arrival time measurement. A packet arrival time measurement is considered valid when the value of the power estimate signal indicates that a packet is being received. A power estimator comprises a bandpass filter, a Hilbert transform, two squaring devices, an adder, and a lowpass filter.
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Alelyunas Carl
DesJardins Philip
Lery Scott A.
2Wire, Inc.
Gaffin Jeffrey
Knapp Justin
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