Robust color wheel phase error method for improved channel...

Television – Video display – Color sequential

Reexamination Certificate

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Details

C348S742000, C348S771000, C348S536000, C348S270000

Reexamination Certificate

active

06738104

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to projection displays and more specifically to that of phase locking the color filter wheel in color field-sequential projection systems.
2. Description of the Related Art
The color wheel dynamics in conventional color field-sequential projectors typically are dampened to help mitigate artifacts caused by switching sequence codes as the speed of the color filter wheel changes. As a result, these projectors can be slow to lock-up at initial spin-up and/or when the channel is changed while operating in the TV mode. For example, a typical first-generation field-sequential Digital Micromirror Device™ (DMD™) projector has the following lock-up characteristics:
Initial spin-up to lock
10 seconds
Channel change re-lock
 4 seconds
In earlier projectors, this was not so much of a problem since they were mostly used in graphics applications in which the displays were connected to computers displaying fixed images. When used to display television signals, however, where there are multiple channels of live video, waiting seconds for the color wheel to lock-up every time a channel is changed is undesirable.
FIG. 1
is a block diagram showing the color wheel synchronization controller in a micromirror projection display system. The controller may include a microprocessor (&mgr;P)
10
, a motor controller and driver
11
, a motor with attached color wheel
12
, and an index sensor
13
. The motor controller and driver circuitry
11
provide a drive signal to the motor and the controller receives a frequency feedback signal from the color wheel/motor assembly
12
. The &mgr;P has two inputs; a Vsync signal and an index signal. The index signal is created by the index sensor
13
every time an index mark, located on the hub or rim of the color wheel, is observed. The &mgr;P has an internal free running timer for event timing. In operation, the occurrence of Vsync captures the timer value as Vsync_toa and generates a Vsync interrupt and the occurrence of an index captures the timer value as index_toa and generates an index interrupt. These captured values are then used to determine the difference between the index and Vsync signals as
index_Vsync_difference=index_toa−Vsync_toa
where toa is the time-of-arrival of the signals. This difference is used to maintain a desired track point by determining a phase_error, which is defined as
phase_error=desired_phase_offset−index_Vsync_difference.
FIG. 2
is a drawing of a typical color wheel
20
. The wheel may have six color filter segments; e.g., two red (R) filters
21
,
24
, two green (G) filters
22
,
25
, and two blue (B) filters
23
,
26
. As white light is applied to the color wheel, a sequential red-green-blue-red-green-blue (R-G-B-R-G-B) filtered light beam is output to the spatial light modulator (SLM) each revolution of the color wheel. In addition, some projection systems use an eight-segment wheel, where two clear segments are included to give a sequential light pattern of R-G-B-W-R-G-B-W. An index mark
27
is also included on the wheel, as shown.
A set of projection display operating modes, called spoke-sync modes, are defined in terms of the number of index periods divided by the corresponding number of Vsync periods; i.e.,
spoke-sync mode=num_index_periods
um_Vsync_periods.
For example in the 5/2 mode (also called 2.5× mode) there are five index periods for every two Vsync periods. Several commonly used modes, along with the applications they are used in, are listed below:
MODE
APPLICATION
4/2 mode
(2× mode)
Graphics
5/2 mode
(2.5× mode)
50 & 60 Hz Vsync
6/2 mode
(3× mode)
50 & 60 Hz Vsync
7/2 mode
(3.5× mode)
50 Hz Vsync
6/1 mode
(6× mode)
30 Hz Vsync
7/1 mode
(7× mode)
24 Hz Vsync
A state counter is used to count the number of index marks over the designated number of Vsync periods for a particular spoke_sync mode. This counter counts from 0 to num_index_periods−1 and resets to zero or increments at the occurrence of each index interrupt. For example, for a 7/2 mode the state counter counts up to 6 (0 through 6) in two Vsync periods. However, since only one of these seven possible index mark occurrences is designated as the primary index mark to be aligned with Vsync, the worst case phase-lock correction can be as much as 1¾ of a wheel rotation, which requires approximately 14 seconds. This has not been a problem for most one-chip micromirror color field-sequential displays since they have been primarily used for stationary data display in which there is no motion in the image that can cause artifacts during re-lock. However, it is a problem for TV and movie displays where there is motion in the image. In this case, there is a need to minimize the phase-lock/re-lock time in order to limit the exposure to those temporal or motion artifacts caused by incorrectly swapping video buffers during the display period. When the color wheel is phase locked, the video buffer swapping occurs between display periods.
The following additional definitions are useful in understanding the color wheel phase-lock process in color field-sequential displays:
fixed_offset
=
minimum



delay



from



Vsync



to



primary



index
=
phase_offset



when



spoke_sync

_counter
=
0
=
approximately



50



μsec
;
 filtered_Vsync_period=long term average of Vsync period;
 spoke_sync_offset=(filtered_Vsync_period *spoke_sync_counter*number_Vsync_periods)
umber_index_periods,
if spoke_Vsync_offset>filtered_Vsync_period then spoke_Vsync_offset=spoke_sync_offset −filtered_Vsync_period; for example, in the 5/2 mode:
Spoke_sync_counter
Spoke_sync_offset
0
0
1
filtered_Vsync_per * 2/5
2
filtered_Vsync_per * 4/5
3
filtered_Vsync_per * 1/5
4
filtered_Vsync_per * 3/5
 desired_phase_offset=fixed_offset+spoke_sync_offset;
index_Vsync difference=index_toa−Vsync_toa;
phase_error
=
desired_phase

_offset
-
index_



Vsync



_difference
,
=
desired_phase

_offset
-
index_



toa
+
Vsync



_



toa
.
In operation, the index_Vsync_difference is subtracted from the desired_phase_offset to determine the phase_error and then the loop corrects to drive the phase_error to zero, thus giving the desired_phase_offset. However, the problem in conventional sequential color projection system is that this correction takes too long and as a result produces temporal and color artifacts in the image.
FIG. 3
is a diagram showing the conditions, based on the above definitions, which exist in counter state
0
. Included are the Vsync pulse
30
, the index pulse
34
, and the discriminator curve showing the phase_error
31
and desired track point
32
. As shown, when the track_point comes in close proximity (approaches) with the Vsync pulse
30
the phase_error
31
goes positive at the desired_track_point
32
. However, if the track_point crosses the Vsync pulse's
30
leading edge position, the previous Vsync_toa is then used in the index_Vsync difference (index_toa−Vsync_toa) calculation causing the calculated phase error to go highly negative rather than continuing in a positive direction. This leaves about 0.6% of a color wheel rotation for the circuit to correct the speed and lock at the desired_track_point
32
. If the color wheel speed error is not zero before the phase error slips past the positive to highly negative transition (see FIG.
3
), the speed will be adjusted to drive the negative phase error to zero, increasing the speed error. Therefore, this condition is called a quasi-stable track point.
A major problem with conventional approaches to phase locking the color wheel is that only one of the index marks (for example, 1 of 5 for the 5/2 mode) is designated to be aligned with the Vsync pulse a

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