Risc type microprocessor and information processing apparatus

Details Risc type microprocessor and information processing apparatus Risc type microprocessor and information processing apparatus

1998-02-20

2001-07-03

Maung, Zarni (Department: 2758)

Electrical computers and digital data processing systems: input/

Interrupt processing

Multimode interrupt processing

C712S233000, C712S043000

Reexamination Certificate

active

06256701

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to information processing systems, and in particular, to a one-chip microcomputer which employs RISC technology to execute interrupt processing and numeric operations at high speed.
2. Description of the Prior Art
Conventional RISCs (Reduced Instruction Set Computers) have been developed as engines for computers mainly to increase the speed of arithmetic operations. The instruction length of the RISCs is normally 32 bits, fixed.
In a one-chip microcomputer employing RISC, since the code efficiency is low, interrupt processing is performed by another chip. Thus, the speed of the interrupt processing is low. In addition, with a conventional one-chip microcomputer, arithmetic operations cannot be performed at high speed.
OBJECTS AND SUMMARY OF THE INVENTION
The present invention is made in view of the above problems. The invention employs RISC technology in a one-chip microcomputer so as to allow both interrupt processing and arithmetic operations to be performed at high speed.
In one illustrative embodiment of the invention, a RISC type microprocessor for implementing multi-stage pipeline processing is provided. The RISC type microprocessor includes mode allocating means, interrupt controlling means and a jump instruction table. The mode allocating means is used for allocating a first mode for cyclically executing processes corresponding to a plurality of interrupts at predetermined intervals or a second mode for successively executing the processes corresponding to the interrupts. The interrupt controlling means is used for controlling the interrupts corresponding to the mode allocated by the mode allocating means, and is operable to save particular information to a stack upon occurrence of an interrupt and to fetch the particular information from the stack upon completion of the interrupt process. The jump instruction table is used in processing interrupts without stopping the multi-stage pipeline processing.
The above, and other, objects, features and advantages of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.


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