Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2006-05-09
2006-05-09
Vo, Tim (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S100000, C710S117000, C710S105000
Reexamination Certificate
active
07043579
ABSTRACT:
The present invention provides a data access ring. The data access ring has a plurality of attached processor units (APUs) and a local store associated with each APU. The data access ring has a data command ring, coupled to the plurality of APUs. The data command ring is employable to carry indicia of a selection of one of the plurality of APUs to the APUs. The data access ring also has a data address ring, coupled to the plurality of APUs. The data address ring is further employable to carry indicia of a memory location to the selected APU a predetermined number of clock cycles after the data command ring carries the indicia of the selection of one of the plurality of APUs. The data access ring also has a data transfer ring, coupled to the plurality of APUs. The data transfer ring is employable to transfer data to or from the memory location associated with the APU a predetermined number of clock cycles after the data address ring carries the indicia of the memory location to the selected APU.
REFERENCES:
patent: 4933836 (1990-06-01), Tulpule et al.
patent: 4979096 (1990-12-01), Ueda et al.
patent: 5119481 (1992-06-01), Frank et al.
patent: 5359716 (1994-10-01), Igarashi
patent: 5361637 (1994-11-01), Judd et al.
patent: 5432909 (1995-07-01), Cok
patent: 5551048 (1996-08-01), Steely, Jr.
patent: 5778202 (1998-07-01), Kuroishi et al.
patent: 5949755 (1999-09-01), Uphadya et al.
patent: 6101321 (2000-08-01), Cok et al.
patent: 6122285 (2000-09-01), Okada
patent: 6243794 (2001-06-01), Casamatta
patent: 6253292 (2001-06-01), Jhang et al.
patent: 6457102 (2002-09-01), Lambright et al.
patent: 6697884 (2004-02-01), Katsch
patent: 6839808 (2005-01-01), Gruner et al.
patent: 2003/0212830 (2003-11-01), Greenblat et al.
patent: 2004/0252682 (2004-12-01), Brueckner et al.
patent: 0 610 938 (1994-08-01), None
patent: 9044464 (1997-02-01), None
Bandat, K. and Izbicki, H.; “Sequentialization of Asynchronous Processors”;IBM Technical Disclosure Bulletin; May 1972; vol. 14, No. 12; pp. 3796-3797.
Dhong Sang Hoo
Hofstee Harm Peter
Liberty John Samuel
Liu Peichun Peter
Carr LLP
Gerhardt Diana R.
Huynh Kim T.
Vo Tim
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