Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing
Reexamination Certificate
2007-07-17
2009-08-11
Knoll, Clifford H (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
Access prioritizing
C710S116000, C370S395420
Reexamination Certificate
active
07574547
ABSTRACT:
The embodiments provide an arbiter in a microprocessor that can handle requests to access a shared resource from function units with different priorities without starving the access opportunities of requests from function units with low priority. In one embodiment, a microprocessor is provided. The microprocessor includes a shared resource and a plurality of requesting entities accessing the shared resource. Each of the plurality of requesting entities has a priority value and requests from the each of the plurality of requesting entities are assigned the priority value. The plurality of requesting entities are function units of the microprocessor. The microprocessor also includes a priority-encode arbiter with an adjustable ring counter disposed between the shared resource and the plurality of requesting entities to control the access requests of the plurality of requesting entities to the shared resource. The adjustable ring counter includes arbitration logic circuitry coupled to a plurality of memory cells being coupled in series. The plurality of memory cells have a first memory cell and a last memory cell. The first memory cell is coupled to a multiplexer. The last memory cell is coupled to the shared resource. There are a plurality of return paths, each of the plurality of return path being coupled to a memory cell at one end and the multiplexer at the other end.
REFERENCES:
patent: 6233645 (2001-05-01), Chrysos et al.
Knoll Clifford H
Martine & Penilla & Gencarella LLP
Sun Microsystems Inc.
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