Rewritable semiconductor memory device having a decoding inhibit

Details Rewritable semiconductor memory device having a decoding inhibit Rewritable semiconductor memory device having a decoding inhibit

1985-07-25

1988-07-19

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Signals

365201, 365233, 365230, 371 21, G11C 700

Patent

active

047589914

ABSTRACT:
A semiconductor memory device is described which includes a memory matrix made up of a plurality of memory elements which are arranged in m rows and n columns, a state setting internal signal generator controlled by state setting external signals temporarily applied to a plurality of address lines for converting a signal applied to one of the address lines into two internal signals having a phase difference of one bit period, a column selection decoder, the decoding function thereof being inhibited by a decoding inhibition signal, and a column selection decoder controller inputted with the state setting internal signals and the decoding function inhibition signal for sending a signal to the column selection decoder according to the state setting internal signals for controlling the decoding function of the column selection decoder in two modes.

REFERENCES:
patent: 4419747 (1983-12-01), Jordan
patent: 4543647 (1985-09-01), Yoshida
patent: 4549101 (1985-10-01), Sood

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