Return address stack including speculative return address...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S242000, C712S238000

Reexamination Certificate

active

06898699

ABSTRACT:
An apparatus for storing predicted return addresses of instructions being executed by a pipelined processor, the apparatus includes a two part return address buffer that includes a speculative return address buffer and a committed return address buffer, both of which having multiple entries that may include predicted return addresses that have been pushed onto the return buffer.

REFERENCES:
patent: 5964868 (1999-10-01), Gochman et al.
patent: 5974543 (1999-10-01), Hilgendorf et al.
patent: 6151671 (2000-11-01), D'Sa et al.
patent: 6314512 (2001-11-01), Branson et al.
patent: 6374350 (2002-04-01), D'Sa et al.

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