Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-02-07
2006-02-07
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S145000, C714S006130
Reexamination Certificate
active
06996675
ABSTRACT:
The retrieval of all tag entries of cache locations for a memory address is disclosed, as well as the determining of an error correcting code (ECC) for the tag entries based thereon. Tag entries of tag memory that correspond to possible cache locations within an n-way associative cache are retrieved for a memory address. An ECC for the tag entries, based on the entries, is determined, and is stored as part of the entries within the tag memory. The n-way associative cache may be a two-way associative cache, such that there are two tag entries corresponding to two possible cache locations within the cache for the memory address. The ECC for the two tag entries are thus based on the two tag entries.
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Peugh Brian R.
Raissinia Abdy
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