Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-01-16
2003-07-15
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06594817
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacture of integrated circuit chips and, in particular, to a method and system for handling multiple photomasks or reticles in lithographic processing of wafers to make multiple patterns on the same wafer process level.
2. Description of Related Art
In the logistical and bill-of-material (BOM) systems that are widely used within the semiconductor industry today, the use of durable goods at key levels of production are generally limited to a one-on-one relationship. Durable goods or durables are resources that are reused throughout the manufacturing process, as contrasted with consumable goods which are used up during manufacturing. A specific, non-limiting example of such a durable is a photo mask, also called a reticle, within the lithography areas of a semiconductor manufacturing facility. Masks or reticles are used in lithographic techniques during the manufacture of integrated circuits to define circuit features on a silicon semiconductor wafer. During construction of the mask, a pattern of the circuit features to be exposed onto the wafer is formed on the mask substrate. The pattern of circuit features is made of an absorptive or opaque material which blocks the beam used in the lithographic process. The beam in the lithographic system exposes a suitable sensitized film covering the wafer. When the wafer is exposed, the pattern on the mask is reproduced in the sensitized film. Subsequent processing, such as developing the sensitized film, etching, and the like reproduces the circuit pattern on the mask on the surface of the wafer to define the desired circuit elements.
Present techniques for handling reticles and other durables in lithographic processing are inefficient because they associate a particular physical reticle to a particular chip, thus limiting the use of the reticle. Further, while there is mention in the prior art of using multiple reticles per lithographic process level, for example, in U.S. Pat. No. 4,702,592, such methods are not believed to have been widely used in practice, and have not been able to efficiently use reticles in processing for either research and development or in production.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method for handling, employing and controlling the use of multiple durables, e.g., reticles, in integrated circuit chip manufacturing.
Another object of the invention is to provide an improved method for employing durables such as reticles within an integrated circuit manufacturing area.
It is a further object of the present invention to provide a method for handling multiple reticles for use on the same lithographic process level in chip production.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method for employing a plurality of reusable durable goods in an integrated circuit manufacturing process which initially comprises providing a matrix of a plurality of durable goods, each matrix comprising a plurality of tuples of durable goods, with each durable goods tuple comprising one or more durable goods. The method includes defining at least one set of valid groups of durable goods in the matrix for use in a desired integrated circuit manufacturing process, defining at least one condition for determining availability of all durable goods in the valid groups in the desired manufacturing process, and comparing the at least one availability condition to the durable goods in the set of valid groups and eliminating valid groups which do not meet the availability condition, leaving non-eliminated valid groups. The method then includes selecting for further comparison or use in the desired integrated circuit manufacturing process durable goods from the non-eliminated valid groups.
In the preferred embodiment described herein, the durable goods comprise lithographic reticles and the reticles from the non-eliminated valid groups are employed in lithographic exposure of a semiconductor wafer.
After eliminating valid groups which do not meet the availability conditions, the method may include defining at least one condition for determining priority of all durable goods in the non-eliminated valid groups in the desired manufacturing process, and comparing the at least one priority condition to the durable goods in the set of valid groups and ranking non-eliminated valid groups according to priority condition. Further, after eliminating valid groups which do not meet the availability conditions, the method may include defining at least one condition for determining priority of all durable goods in the non-eliminated valid groups in the desired manufacturing process, assigning a weight to each condition for determining priority of the durable goods in the non-eliminated valid groups, and comparing the at least one weighted priority conditions to the durable goods in the set of valid groups and ranking non-eliminated valid groups according to weighted priority condition.
Preferably, the method includes a plurality of conditions for determining priority of all durable goods in the non-eliminated valid groups in the desired manufacturing process. The valid groups of durable goods in the matrix may be determined by applying a rule of interpretation which depends on the type of manufacturing process.
In some instances, the durable goods may be identical in each tuple and each tuple contains durable goods different from other tuples, and the set of valid groups of durable goods in the matrix is defined as only one durable good per matrix tuple. In other instances, the durable goods are different in each tuple, and the set of valid groups of durable goods in the matrix is defined as only one matrix tuple in its entirety. In the latter instance, a durable good in one tuple may be identical to one durable good in another tuple.
In another aspect, the present invention relates to a method for employing a plurality of reusable reticles in an integrated circuit manufacturing process employing lithographic exposure of a semiconductor wafer. Initially there is provided a matrix of a plurality of reticles, each matrix comprising a plurality of tuples of reticles, each reticle tuple comprising one or more reticles. The method then includes defining at least one set of valid groups of reticles in the matrix for use in a desired lithographic exposure process, defining a set of conditions for determining availability of all reticles in the valid groups in the lithographic exposure process, and comparing the availability conditions to the reticles in the set of valid groups and eliminating valid groups which do not meet the availability conditions, leaving non-eliminated valid groups. The method also includes defining a set of conditions for determining priority of all reticles in the non-eliminated valid groups in the lithographic exposure process, comparing the priority conditions to the reticles in the set of valid groups and ranking non-eliminated valid groups according to the priority conditions, and selecting for use in the lithographic exposure process reticles from the non-eliminated valid groups according to ranking by the priority conditions.
Preferably, before comparing the priority conditions to the reticles in the set of valid groups, the method includes assigning a weight to each condition for determining priority of the reticles in the non-eliminated valid groups, and comparing the weighted priority conditions to the reticles in the set of valid groups and ranking non-eliminated valid groups according to weighted priority condition. The reticles from the non-eliminated valid groups may be employed in lithographic exposure of a single process level of a semiconductor wafer. The valid gro
Federico John T.
Hartswick Perry G.
Thomas Alan C.
C. Li Todd M.
DeLio & Peterson LLC
International Business Machines - Corporation
Levin Naum
Peterson Peter W.
LandOfFree
Reticle exposure matrix does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Reticle exposure matrix, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reticle exposure matrix will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3086617