Retarded double diffused drain device structure

Details Retarded double diffused drain device structure Retarded double diffused drain device structure

1996-08-30

1997-08-05

Whitehead, Jr., Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257337, 257339, 257327, 257328, H01L 2976, H01L 2994, H01L 31062

Patent

active

056545690

ABSTRACT:
A method of forming a retarded double diffused drain structure, and the resultant retarded double diffused drain structure, for a field effect transistor are described. A silicon substrate with field isolation regions and a gate structure is provided. A layer of photoresist is formed on the field isolation region, the silicon substrate, and the gate structure. The photoresist is patterned to expose the silicon substrate and the gate structure, but covers an area of the silicon substrate that is offset from the field isolation regions. A first ion implant is performed in a vertical direction in exposed regions of the silicon substrate, with suitable dopant having a high doping concentration. The photoresist is removed. A second ion implant is performed in a vertical direction in the silicon substrate, with suitable dopant with higher doping concentration than the first ion implant, in regions between the field isolation regions and the gate structure. The substrate is heated to drive in both the dopants.

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Sze, S.M., "VLSI Technology," pub. by McGraw-Hill International, Singapore, 1988, pp. 482-483.

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