Resource use management device, resource use management...

Details Resource use management device, resource use management... Resource use management device, resource use management...

2007-06-01

2010-06-29

Knoll, Clifford H (Department: 2111)

Electrical computers and digital data processing systems: input/

Access arbitrating

Decentralized arbitrating

C710S116000, C370S395410

Reexamination Certificate

active

07747806

ABSTRACT:
In a bus arbitration device that utilizes a resource use management device, upon detecting that a processor is permitted to access a memory, a detection unit decreases a counter by 1 and starts a timer, in a delay circuit, that is not in operation to count time. When the timer counts to a predetermined cycle time period, the delay circuit increases the counter by 1. A control unit permits the processor to access the memory, if the counter is larger than 0.

REFERENCES:
patent: 6324616 (2001-11-01), Chrysos et al.
patent: 6868466 (2005-03-01), Connor
patent: 2005/0204085 (2005-09-01), Fukuyama et al.
patent: 2005-258867 (2005-09-01), None
Giorgio C. Buttazzo, “Hard Real-Time Computing Systems, Predictable Scheduling Algorithms and Applications”, Kluwer Academic Publishers, Second Printing 2000, pp. 132-139.

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