Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-10-11
2010-11-09
Hwang, Joon H (Department: 2447)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S784000, C375S222000
Reexamination Certificate
active
07831890
ABSTRACT:
A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
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Lund Michael
Tzannes Marcos C.
Aware Inc.
Hwang Joon H
Pfizenmayer Mark
Sheridan & Ross P.C.
Vick Jason H.
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