Resource bus interface

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C345S506000

Reexamination Certificate

active

06446155

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to any bus architecture, such as the universal serial bus (USB), and in particular to communication among devices coupled directly and indirectly to such a bus.
Computers are becoming increasingly common place. As computers become more powerful, their capabilities also grow. In fact, computers are quickly replacing the functionality of other equipment such as telephones, televisions, cameras, and the like. Manipulation of image data is one of these new areas which has been met with considerable enthusiasm by consumers and corporations alike. The advent of relatively inexpensive cameras which can be connected to any computer is helping this move. Logitech, Inc., of Fremont Calif., the assignee of the present application, has been in the forefront of this technology and provides many solutions for computer users.
One easy way for connecting image capturing equipment to a computer is through a USB interface. Currently, USB provides plug and play support for more than 100 peripherals without significant user interaction. Further information regarding USB can be found in the USB specification, revision 1.1, released Sep. 23, 1998, which is hereby incorporated herein by reference.
One way to provide additional ports to USB is by using USB hubs. These hubs, however, merely provide additional physical connections to a computer with a USB interface. Therefore, USB hubs do not provide the intelligence or flexibility required for adding additional functionality to a USB interconnection.
As usage of image data becomes increasingly popular, the demand for more functionality and flexibility within electronic systems increases. The additional functionality and flexibility may include more image processing routines or connectivity with new and additional interfaces. Also, as different image processing standards and communication interfaces are introduced, the need for an implementation that can be easily adapted increases.
Accordingly, a technique is desirable wherein data processing devices can be operated in a variety of modes, to more quickly, efficiently, and easily adapt to many existing and future data processing standards and communication protocols.
SUMMARY OF THE INVENTION
The present invention provides new and improved methods and apparatus for transmitting data over a data bus. The invention, in one embodiment, provides a bus system including an external shared bus, an external bus interface, and a resource bus. The external bus interface can be configured to move data between the external shared bus and the resource bus. The bus system can also include a data processing pipeline coupled to the resource bus. The data processing pipeline can include a plurality of components for processing data. Some of the data processing components can be coupled to the resource bus.
In another embodiment, the bus system can include data collection modules. The data collection modules can be configured to collect information from devices coupled to the resource bus.
In yet another embodiment, the present invention provides a method for automatically adjusting a data processing pipeline to avoid introduction of artifacts into data being processed by the data processing pipeline. The method includes collecting information from a component within the data processing pipeline. The collected information is then processed to determine whether to make an adjustment to the data processing pipeline. If it is determined that an adjustment is to be made to the data processing pipeline, a triggering event is determined. The method then waits for the determined triggering event before making the adjustment.
In a further embodiment, the present invention provides a method for synchronizing operations in a bus system. The method receives data, loads the received data into a shadow storage, and determines whether to update an active storage with the loaded data from the shadow storage. If it is determined that the active storage is not to be updated with the loaded data from the shadow storage, the method waits for the next determining step. Once it is determined that the active storage is to be updated with the loaded data from the shadow storage, the method transfers the loaded data from the shadow storage into the active storage. In this fashion, the provided delay by the waiting step avoids introduction of artifacts into data being processed.
One advantage of the present invention is that it allows for a data processing pipeline to be quickly, efficiently, and easily adapted to a variety of modes. For example, the external bus interface can be modified to accommodate for changes in the modules connected to the resource bus, such as those within the data processing pipeline. Similarly, for a different type of the external shared bus, modification can be made to the external bus interface alone.
Another advantage of the present invention includes providing automatic adjustments to selected components of a data processing pipeline and, thereby, avoiding introduction of artifacts into data being processed by the data processing pipeline. These adjustments can be based on data collected from selected components of the data processing pipeline. Also, the adjustments can be made at the data capturing end before any data is manipulated. This will allow for more accurate corrections, for example, if the data is compressed using a lossy compression. Additionally, making the adjustments at the data capturing end can reduce the required bandwidth for transferring the data to a host for processing.
For a further understanding of the nature and advantages of the invention, reference should be made to the following description taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 6188381 (2001-02-01), van der Wal et al.
patent: 6329996 (2001-12-01), Bowen et al.

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