Resolving processor and system bus address collision in a high-l

Details Resolving processor and system bus address collision in a high-l Resolving processor and system bus address collision in a high-l

1996-10-07

1998-11-03

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711146, 711150, G06F 1300

Patent

active

058322760

ABSTRACT:
A L2 cache for resolving collisions between processor request originating from a processor and system request originating from a computing unit attached to the system bus is provided. First, the L2 cache snoops a system request to access a shared resource. This shared resource is often an area of main memory contained in the L2 cache. Next, the L2 cache receives a processor request to access the shared resource also. The L2 cache will delay sending an acknowledge signal to the processor. The L2 cache then makes a determination as to whether the address and system request type must be sent to the processor. If data associated with the system request would alter a line in a L1 cache associated with the processor, a retry signal is sent to the processor. If the system request would not alter a line in the L1 cache, the L2 cache will wait until the system request finishes accessing the shared resource to process the processor request, thereby avoiding the sending of a retry signal to the processor.

REFERENCES:
patent: 3889237 (1975-06-01), Alferness et al.
patent: 4695950 (1987-09-01), Brandt et al.
patent: 4868741 (1989-09-01), Gula et al.
patent: 5003461 (1991-03-01), Fritsche
patent: 5091846 (1992-02-01), Sachs et al.
patent: 5133074 (1992-07-01), Chou
patent: 5297269 (1994-03-01), Donaldson et al.
patent: 5446863 (1995-08-01), Stevens et al.
patent: 5471601 (1995-11-01), Gonzales
patent: 5511224 (1996-04-01), Tran et al.
patent: 5664154 (1997-09-01), Purcell et al.

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