Resistive memory element sensing using averaging

Static information storage and retrieval – Read/write circuit – Particular read circuit

Reexamination Certificate

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C365S189070, C365S189090, C365S158000, C365S148000, C365S168000, C365S233100, C365S236000, C365S230080, C324S711000, C324S712000, C324S677000, C324S678000

Reexamination Certificate

active

07577044

ABSTRACT:
A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge reservoir, a current source, and a pulse counter. The controlled voltage supply is connected to the resistive memory cell element to maintain a constant voltage across the resistive element. The charge reservoir is connected to the voltage supply to provide a current through the resistive element. The current source is connected to the charge reservoir to repeatedly supply a pulse of current to recharge the reservoir upon depletion of electronic charge from the reservoir, and the pulse counter provides a count of the number of pulses supplied by the current source over a predetermined time. The count represents a logic state of the memory cell element.

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