Resistive memory and data write-in method

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S163000

Reexamination Certificate

active

07924601

ABSTRACT:
An ReRAM of the present invention includes a high speed write-in region and a main memory region, only memory cells designated to have the storage state out of the memory cells corresponded to data are set to the storage state in the high speed write-in region. The data written in the memory cell array are transferred to the main memory region, the memory cells of the memory cell array corresponded to the data transferred from the high speed write-in region are reset to the no-storage state in the main memory region, only the memory cells designated to have the storage state out of the memory cells are set, and all memory cells are reset to the no-storage state, or the initial state, in the high speed write-in region.

REFERENCES:
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patent: 2005/0117388 (2005-06-01), Cho et al.
patent: 2008/0170428 (2008-07-01), Kinoshita
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patent: 2007/023569 (2007-03-01), None
Notification of Transmittal of Translation of the International Preliminary Report on Patentability (Forms PCT/IB/338) of International Application No. PCT/JP2007/056712 mailed Oct. 29, 2009 with Forms PCT/IB/373 and PCT/ISA/237.
I. G. Baek et al, “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven as Asymmetric Unipolar Voltage Pulses,” Technology Digest International Electron Devices Meeting, 2004, pp. 587-590.
International Search Report of PCT/JP2007/056712, mailing date of Jan. 8, 2008.

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