Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-03-20
2007-03-20
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S027000, C323S909000, C323S909000, C324S601000
Reexamination Certificate
active
11017880
ABSTRACT:
A method for compensating for semiconductor device resistance is disclosed that includes the step of realizing a resistance equal to a desired resistance by one of combinations of multiple semiconductor devices. This step includes the step of sequentially selecting two or more of the semiconductor devices to be combined, and thereby sequentially changing a resistance realized by the selected two or more of the semiconductor devices to be combined.
REFERENCES:
patent: 6429679 (2002-08-01), Kim et al.
patent: 6541996 (2003-04-01), Rosefield et al.
patent: 6605958 (2003-08-01), Bergman et al.
patent: 10-133792 (1998-05-01), None
patent: 2002-199030 (2002-07-01), None
Aikawa Tadao
Miyake Hiroshi
Miyazaki Hiroshi
Tokuhiro Noriyuki
Arent Fox LLP.
Barnie Rexford
Crawford Jason
Fujitsu Limited
LandOfFree
Resistance compensation method, circuit having a resistance... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Resistance compensation method, circuit having a resistance..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resistance compensation method, circuit having a resistance... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3721673